Sedat ünalacak
About Sedat ünalacak
Sedat Ünalacak is an ASIC Verification Engineer with a background in embedded electronic systems. He has worked at various institutions, including Axis Communications and Chalmers University of Technology, and holds degrees from Bilkent University and Chalmers University.
Work at Axis Communications
Sedat ünalacak has been employed at Axis Communications as an ASIC Verification Engineer since 2021. In this role, he focuses on the verification of application-specific integrated circuits (ASICs), utilizing his expertise in digital design and verification. His work involves implementing coverage-driven constrained random verification techniques, particularly using the Universal Verification Methodology (UVM). This position allows him to apply his skills in a practical environment, contributing to the development of advanced technology solutions.
Education and Expertise
Sedat ünalacak holds a Master's degree in Embedded Electronic System Design from Chalmers University of Technology, which he completed from 2019 to 2021. He also earned a Bachelor's degree in Electrical and Electronics Engineering from Bilkent University, studying from 2014 to 2019. His academic background provides a strong foundation in both theoretical and practical aspects of electronic systems, enhancing his capabilities in ASIC verification and embedded hardware/software development.
Previous Experience in Engineering
Prior to his current role, Sedat ünalacak gained valuable experience in various engineering positions. He worked as a Research Development Electronic Engineer at ANDAR Electromechanical Systems from 2017 to 2019 in Ankara, Turkey. He also served as a Teaching Assistant at Chalmers University of Technology for 11 months in 2020. Additionally, he completed a Summer Engineering Internship at Huawei Technologies Sweden AB and conducted his Master Thesis at Volvo Cars, both in Gothenburg, Vastra Gotaland County, Sweden.
Technical Specialization
Sedat ünalacak specializes in coverage-driven constrained random verification, employing the Universal Verification Methodology (UVM). His technical skills encompass both digital design and verification, as well as embedded hardware/software development. This specialization enables him to effectively contribute to the verification processes within his current role and throughout his engineering career.