Yazdan Torabian
About Yazdan Torabian
► Digital Logic Design targeted towards FPGA Design in System-Oriented Companies. ☎ (408) 313-2936 / yazdan.torabian@gmail.com ✱ SENIOR FPGA DESIGN ENGINEER / LOGIC DESIGN ENGINEER / ASIC to FPGA ✱ MS Degree, Electrical Engineering / BS Degree, Computer Engineering / Signal Processing Cert ─ ─ ─ ─ ─ ─ ─ ─ ─ EXCELLENCE IN EXECUTION ─ ─ ─ ─ ─ ─ ─ ─ ─ ► Senior FPGA Design Engineer offering over 10 years’ experience in FPGA design engineering including life-cycle process ownership of specifications, architecture, programming, emulation, verification, maintenance and upgrades. ► Deep analytical, architectural and programming skills; high-level verification languages; and top-tier error-free market ready designs. ► Expert knowledge-level of computer engineering, from vision to analysis, design, validation, and deployment. ► Expertise in Data Security, Consumer Electronic Devices, Semiconductor Testing, and Military Defense FPGA applications. ► Solves complex engineering problems using contemporary engineering principles, methodologies, and tools. ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ TECHNICAL EXPERTISE ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ✱ TECHNICAL SKILLS / DESIGN TOOLS / VALIDATION / PROTOCOLS / PROGRAMMING ✱ FPGA-Design, Logic-Design (RTL: Verilog, System Verilog, VHDL), Xilinx ISE/Vivado; Altera Quartus, DSP48 Block of Xilinx and SerDes, GTH/GTX/GTP of Xilinx and Achronix, Implementation of various Protocols (SAS, SATA, DDR-3, PCI_E, USB 3.0, Ethernet) in the FPGA, SerDes Validation (Jtol), Signal Processing Implementation in the FPGA (Cordic, DDS), BER Design in the FPGA, ASIC Emulation in the FPGA, On-chip Logic Analyzer Implementation, such as Chip-scope, Signal–Tap, Schematic Capture (OrCad ), C++, Perl, AHB Bus, Verification of Large Systems with OVM, Driver Software using C Coding, Embedded Mips Process Debugging with Imagination Tool, Digital Board Design Skills ► Expertise: Sr FPGA Design Engineer / SerDes Validation Engineer / Logic Design Engineer / Hardware Engineer