Jianguang Li

Hardware Design Engineer @ Achronix

About Jianguang Li

Jianguang Li is a Hardware Design Engineer with extensive experience in the semiconductor industry, currently working at Achronix Semiconductor Corporation since 2019. He has held various engineering roles at notable companies, including Oracle and Sun Microsystems, and possesses expertise in low power CMOS technology and high-speed SRAM circuit design.

Work at Achronix

Jianguang Li has been employed at Achronix Semiconductor Corporation as a Hardware Design Engineer since 2019. In this role, he contributes to the design and development of advanced semiconductor technologies. His work is based in Santa Clara, California, where he has been part of the team for five years.

Previous Experience at Sun Microsystems

Before joining Achronix, Jianguang Li worked at Sun Microsystems as a Senior Hardware Engineer from 2004 to 2011. During his seven years at the company, he focused on hardware engineering projects in Santa Clara, contributing to various initiatives within the organization.

Career at Oracle

Jianguang Li served as a Principal Hardware Engineer at Oracle from 2011 to 2017. His six-year tenure involved leading hardware design efforts in Santa Clara, where he applied his expertise to enhance the company's hardware capabilities.

Education and Expertise

Jianguang Li holds a Master's Degree from the University of Minnesota, which he completed between 1999 and 2001. He also studied at Zhejiang University. His expertise includes custom mega cell design with low power CMOS technology and high-speed SRAM circuit design, showcasing his strong background in hardware engineering.

Technical Contributions

Jianguang Li has hands-on experience with cluster implementation on the largest SOC cluster in the SPACE chip, specifically the OCN (on-chip Network). He has a proven track record of delivering high-quality designs for the SPACE microprocessor series, from SPACE III to SPACE VII, demonstrating his technical proficiency in the field.

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