Daniel Phelps
About Daniel Phelps
Daniel Phelps is a Staff Validation Engineer with extensive experience in system-level validation testing and debugging. He has worked for KIOXIA America, Toshiba America, and Intel Corporation, contributing to various engineering roles over several decades.
Work at Kioxia
Daniel Phelps has been employed at KIOXIA America, Inc. as a Staff Validation Engineer since 2019. His role involves system-level validation testing and debugging, ensuring compliance of chipsets to silicon specifications. He operates out of Folsom, California, contributing to the company's efforts in memory and storage solutions.
Current Role at Toshiba America
In addition to his position at KIOXIA, Daniel Phelps has worked at Toshiba America as a Staff Validation Engineer since 2018. His responsibilities include validation tasks that support the development of Toshiba's technology products. This role complements his extensive background in validation engineering.
Experience at Intel Corporation
Daniel Phelps has a long tenure at Intel Corporation, where he currently serves as an Electrical Validation Engineer since 2016. His previous roles at Intel include Product Engineer, System Validation Engineer/Manager, Senior Software Engineer, and Senior System Engineer, spanning a total of over 20 years. His experience encompasses a wide range of engineering disciplines and responsibilities.
Education and Expertise
Daniel Phelps earned his Bachelor's degree in Computer Engineering from Iowa State University, completing his studies from 1980 to 1984. He possesses proficiency in multiple programming languages, including C, C++, Python, and Visual Basic. His expertise extends to developing and debugging software across various operating systems, including Linux, DOS, and Windows.
Technical Skills and Tools
Daniel Phelps has extensive experience in system-level validation testing and debugging. He is skilled in using debug equipment such as Digital Logic Analyzers and Digital Oscilloscopes. His familiarity with hardware levels includes multiple buses like PCI Express, Non-Volatile Memory Express, and USB, among others, which supports his work in ensuring chipset compliance.