曹俊杰
About 曹俊杰
Cao Junjie is an Analog IC Design Engineer at Onsemi in Beijing, China, where he has worked since 2019. He holds a master's degree in Integrated Circuit Design and Integrated Systems from Heilongjiang University and has significant experience in the design and verification of various analog and power switch models.
Work at Onsemi
Currently employed at Onsemi as an Analog IC Design Engineer since 2019, 曹俊杰 has been based in Haidian District, Beijing, China. In this role, he focuses on the design and verification of various analog integrated circuits. His work includes significant contributions to the design and verification of a MIPI Switch that has successfully reached mass production. He is also involved in the research and development of new Power Switch models, showcasing his commitment to advancing technology in the semiconductor industry.
Education and Expertise
曹俊杰 studied at Heilongjiang University, where he earned a Master's degree in Integrated Circuit Design and Integrated Systems from 2008 to 2014. This educational background provided him with a strong foundation in analog circuit design and system integration, which he applies in his current role at Onsemi. His expertise includes the design and verification of analog and power switch models, demonstrating his proficiency in the semiconductor field.
Background
Before joining Onsemi, 曹俊杰 worked at Galio Electronics, where he played a key role in the mass production of three series of Low Dropout Regulators (LDOs), one DC-DC converter, and one Charge Pump. His experience in this position equipped him with valuable skills in product development and production processes within the electronics sector. He has a solid track record of contributing to successful product launches in the semiconductor industry.
Achievements
Throughout his career, 曹俊杰 has been involved in the design and verification of multiple Analog Switch and Power Switch models, contributing to their successful mass production. His responsibilities have included guiding Layout Designers in layout design optimization and writing related technical documentation. These contributions reflect his technical capabilities and his role in ensuring the quality and efficiency of the design process.