Berardino Carnevale
About Berardino Carnevale
Berardino Carnevale is a Principal Engineer specializing in Security System Architecture and Product Certification at Rambus, where he has worked since 2022. He holds a PhD in Embedded Systems for Security Applications and has extensive experience in designing secure architectures and conducting system security analyses.
Current Role at Rambus
Berardino Carnevale currently serves as a Principal Engineer in Security System Architecture and Product Certification at Rambus. He has held this position since 2022, working in Glasgow, Scotland. His responsibilities include designing fault-resistant architectures and implementing countermeasures against side-channel attacks. Carnevale's expertise contributes to the development of secure systems and enhances product certification processes.
Previous Experience at Rambus
Prior to his current role, Carnevale worked at Rambus as a Lead MTS in Security System Architecture and Product Certification from 2021 to 2022. Before that, he served as a Senior MTS in the same department from 2019 to 2021. During his tenure, he specialized in FPGA technology and contributed to the design and implementation of security solutions.
Educational Background
Carnevale has an extensive educational background in engineering and cybersecurity. He studied at the University of Strathclyde, where he earned a Master of Science in Cyber Security from 2021 to 2023. He also holds a Doctor of Philosophy (PhD) in Embedded Systems for Security Applications from Università di Pisa, completed in 2023. Additionally, he obtained a Master of Science and a Bachelor of Science in Electrical and Electronics Engineering from the same institution.
Professional Experience in Security Design
Before joining Rambus, Carnevale worked in various roles that focused on hardware security design. He was a Hardware Security Design Engineer at Renesas Electronics from 2014 to 2017, where he developed security solutions for high-speed communications. He also served as a Senior Hardware Design Engineer at NEC Corporation from 2017 to 2019, further enhancing his expertise in secure embedded systems.
Research and Development Contributions
Carnevale has contributed to research and development in the field of security. He worked as a Graduate Research Fellow at the Dipartimento di Ingegneria dell'Informazione at Università di Pisa from 2013 to 2014. His work included conducting high-level system security analysis, threat modeling, and risk assessment, which are critical for developing robust security architectures.