Sasikala Jagadeesan
About Sasikala Jagadeesan
Sasikala Jagadeesan is a Senior Package Design Engineer at Achronix Semiconductor Corporation in Santa Clara, California, where she has worked since 2018. She holds a Bachelor of Engineering in Electronics from Anna University and has over 17 years of experience as a Package Designer at Bayside Design Inc.
Work at Achronix Semiconductor Corporation
Sasikala Jagadeesan has been employed at Achronix Semiconductor Corporation since 2018, serving as a Senior Package Design Engineer. In this role, she focuses on the design and development of semiconductor packaging solutions. Her tenure at Achronix has spanned six years, during which she has contributed to various projects aimed at enhancing the performance and reliability of semiconductor products. The company is located in Santa Clara, California, a hub for technology and innovation.
Current Role at Bayside Design Inc
In addition to her position at Achronix, Sasikala Jagadeesan has worked as a Package Designer at Bayside Design Inc since 2007. With 17 years of experience in this role, she specializes in creating packaging designs that meet industry standards and client specifications. Her expertise in package design has been instrumental in delivering effective solutions in the semiconductor sector.
Education Background
Sasikala Jagadeesan completed her Bachelor of Engineering degree in Electronics at Anna University from 2001 to 2005. This educational background provided her with a solid foundation in electronics and engineering principles, which she has applied throughout her career in the semiconductor industry. Prior to her studies at Anna University, she attended Alvernia Matric Hr. Sec. School in Coimbatore.