Zhenxiong (Felix) Ouyang
About Zhenxiong (Felix) Ouyang
Zhenxiong (Felix) Ouyang is a Staff Engineer at Achronix Semiconductor Corporation, specializing in DDR PHY design and network on chip performance modeling. He has previously held positions at Oracle and Apple, contributing to advanced memory subsystem integration and system level architecture.
Current Role at Achronix Semiconductor Corporation
Zhenxiong (Felix) Ouyang serves as a Staff Engineer at Achronix Semiconductor Corporation. He has been in this position since 2021, contributing to the development of advanced semiconductor technologies in Santa Clara, California. His work focuses on optimizing network on chip designs, specifically through NOC performance modeling. This role allows him to leverage his expertise in hardware design and system architecture.
Previous Experience at Apple
Prior to his current role, Ouyang worked at Apple as a Senior Hardware Design Engineer from 2017 to 2021. In this capacity, he was responsible for conducting feasibility studies of external IPs, which played a crucial role in enhancing system-on-chip (SoC) architecture. His four years at Apple provided him with extensive experience in hardware design and integration.
Experience at Oracle
Ouyang has a notable history with Oracle, where he held two positions. He initially worked as a Hardware Engineer from 2014 to 2016 for two years, followed by a role as a Senior Hardware Engineer for three months in 2016 to 2017. During his tenure at Oracle, he was involved in various hardware engineering projects in Santa Clara, California, contributing to the company's technology initiatives.
Internship at Fibocom Wireless Inc
In 2013, Ouyang completed a summer internship at Fibocom Wireless Inc in Shenzhen, China. This one-month experience provided him with early exposure to hardware engineering in a professional setting, laying the groundwork for his future career in the technology sector.
Education and Expertise
Ouyang studied Electrical Engineering at the University of Michigan, where he earned both a Master of Arts and a Bachelor of Science from 2009 to 2013. He also attended Lake Forest Academy from 2006 to 2009. His academic background supports his specialization in DDR PHY design and advanced memory subsystem integration projects.