Bansil Vaghasiya
About Bansil Vaghasiya
Bansil Vaghasiya is a Design Verification Engineer currently working at Ampere in the San Francisco Bay Area. He has a strong background in electrical engineering, with expertise in clock domain crossing, scripting, bus protocols, and low power design techniques.
Work at Ampere
Bansil Vaghasiya has been employed at Ampere as a Design Verification Engineer since 2021. His role focuses on ensuring the integrity and functionality of designs through rigorous verification processes. He operates within the San Francisco Bay Area, contributing to the development of advanced semiconductor solutions. His expertise in design verification is supported by his knowledge of various bus protocols and low power design techniques.
Education and Expertise
Bansil Vaghasiya holds a Master of Science in Electrical and Electronics Engineering from San Jose State University, where he studied from 2019 to 2021. He also earned a Bachelor of Technology in Electrical, Electronics and Communications Engineering from Nirma University, completing his studies from 2015 to 2019. His academic background provides a strong foundation for his expertise in clock domain crossing, scripting with Python and C, and the use of EDA tools.
Background
Before joining Ampere, Bansil Vaghasiya worked as a Teaching Associate at San Jose State University for nine months in 2020 to 2021. He also served as Club Admin and Logistic Head for the Electronics and Communication Students' Organisation in Ahmedabad, India, from 2016 to 2018. Additionally, he gained practical experience as a Hardware Engineering Intern at Maharshi Electronic Systems for four months in 2018 to 2019.
Technical Skills
Bansil Vaghasiya possesses a range of technical skills essential for his role in design verification. He is experienced in handling various bus protocols, including AHB AMBA, APB, SPI, I2C, and UART. His proficiency in low power design techniques contributes to energy-efficient hardware development. Furthermore, he is skilled in using EDA tools such as Synopsys VCS, Design Compiler, and Prime Time, which are critical for the design verification process.