Andrew Ang
About Andrew Ang
Andrew Ang is an FPGA Design Engineer at Arista Networks with a background in Electrical and Electronics Engineering from Victoria University of Wellington.
Current Position at Arista Networks
Andrew Ang has been working as an FPGA Design Engineer at Arista Networks since 2019. Based in Sydney, New South Wales, Australia, he is involved in various projects that leverage his expertise in FPGA/SoC technology. His responsibilities also include the development of Linux device drivers, integrating hardware with software systems.
Previous Experience at Dosec Design
Before joining Arista Networks, Andrew Ang served as a Junior Hardware Design Engineer at Dosec Design for 9 months, from 2018 to 2019. During his time there, he participated in hardware development projects, honing his skills in FPGA design and PCB layout using Altium software.
Educational Background
Andrew Ang holds both a Master of Engineering (MEng) and a Bachelor’s Degree in Electrical and Electronics Engineering from Victoria University of Wellington. He completed his studies there from 2013 to 2016. Additionally, he spent 11 months at the University of Otago in 2012, further expanding his foundational knowledge in engineering.
Research and Teaching Experience
Andrew Ang has significant research experience, having worked as a Graduate Research Student at ikeGPS from 2015 to 2016. Additionally, he served as a Tutor at Inspiration Education Limited from 2014 to 2016, where he provided educational support to students. As a Masters Student at Victoria University of Wellington from 2017 to 2018, he continued to develop his research skills.
Technical Skills and Specializations
Andrew Ang specializes in FPGA design, with extensive experience in VHDL/Verilog programming. He is proficient in High Level Synthesis (HLS) and has developed PCI extensions for Instrumentation (PXI) Express systems. His technical skills also encompass PCB design using Altium software, as well as the development of Linux device drivers.