Madhura Kamat
About Madhura Kamat
Madhura Kamat is an FPGA Design Engineer at Arista Networks with a background in SOC design and product testing from previous roles at Intel and Qualcomm.
Current Position at Arista Networks
Madhura Kamat is currently working at Arista Networks as an FPGA Design Engineer. Since 2022, she has been contributing to the company's projects in Santa Clara, California, United States. Her role focuses on the design and implementation of FPGA solutions, which play a crucial part in the company's hardware development efforts.
Previous Experience at Intel Corporation
Before joining Arista Networks, Madhura Kamat worked at Intel Corporation as an SOC Design Engineer from 2016 to 2021. Based in San Jose, California, she accumulated five years of experience. During this time, she was involved in system-on-chip (SOC) design, contributing to Intel's advancements in semiconductor technologies.
Role at Qualcomm
Madhura Kamat served as a Product and Test Engineer at Qualcomm from 2013 to 2016. Her three-year tenure in the Greater San Diego Area involved developing and testing products, ensuring that they met Qualcomm's high standards for quality and performance.
Academic Background at University of Pennsylvania
Madhura Kamat holds a Master of Science in Electrical Engineering from the University of Pennsylvania, where she studied from 2011 to 2013. Additionally, she worked as a Graduate Research Assistant in 2012 for 4 months, contributing to academic research projects. Her time at Penn provided her with a robust foundation in electrical engineering principles and research methodologies.
Education at Birla Institute of Technology and Science, Pilani
Madhura Kamat completed a combined degree in Master of Science in Mathematics and Bachelor of Engineering at the Birla Institute of Technology and Science, Pilani, from 2006 to 2011. This five-year program equipped her with a strong interdisciplinary background in mathematics and engineering, essential for her subsequent professional roles.