Tuan Nguyen
About Tuan Nguyen
Tuan Nguyen is an FPGA Design Engineer at Arista Networks with extensive experience in FPGA and ASIC design, having worked at various institutions including Xilinx and cfaed.
Title and Current Position
Tuan Nguyen serves as an FPGA Design Engineer at Arista Networks. He has been with the company since 2022 and is based in Sydney, New South Wales, Australia. His role involves designing and developing FPGA-based systems.
Professional Experience
Tuan Nguyen has amassed a diverse range of experience in the field of FPGA and ASIC design. Before joining Arista Networks, he worked as a Staff Research Engineer at Xilinx in Singapore from 2019 to 2021. He also contributed as a Postdoctoral Researcher at the Center for Advancing Electronics Dresden (cfaed) from 2018 to 2019 in Germany. His earlier roles include a stint as an FPGA Developer at Grasshopper Pte Ltd in 2017 and various research positions at cfaed. Additionally, he worked at AppliedMicro in Ho Chi Minh as an ASIC Design Consultant and earlier as an ASIC Engineer.
Education Background
Tuan Nguyen holds a Doctor of Philosophy (PhD) in Computer Engineering from the National University of Singapore, which he obtained after four years of study from 2013 to 2017. Prior to that, he earned a Bachelor's degree in Computer Engineering from Vietnam National University Ho Chi Minh City - Ho Chi Minh City University of Technology, where he studied from 2006 to 2011. He also attended Bac Lieu Specialized High School, specializing in Chemistry, from 2003 to 2006.
Contributions to FPGA Design
Tuan Nguyen has contributed significantly to the development of FPGA-based systems. He has developed tools and techniques enabling partial reconfiguration in these systems and has designed time-division-multiplexed circuit switch network-on-chip architectures. His work focuses on balancing data latency and clock period to optimize performance.
Technical Skills and Expertise
Tuan Nguyen possesses a strong skill set in FPGA and ASIC design. He is proficient in Verilog, SystemVerilog, C/C++, TCL/Bash, and Xilinx tools. His professional experience includes ASIC design verification using constrained random and coverage-driven methodologies. He advocates for the integration of FPGA in high-performance computing.