Sooraj J P
About Sooraj J P
Sooraj J P is a Senior Test Engineer currently working at Brillio in Bengaluru, Karnataka. He has a background in Electrical, Electronic and Communications Engineering and has experience in quality engineering and physical design in VLSI technologies.
Work at Brillio
Sooraj J P holds the position of Senior Test Engineer at Brillio, where he has been employed since 2021. His role involves overseeing quality assurance processes and ensuring the reliability of software products. He is based in Bengaluru, Karnataka, India, and contributes to the company's commitment to delivering high-quality technology solutions.
Current Role at Altimetrik
Sooraj J P has been working at Altimetrik as an Engineer in Quality Engineering since 2020. His responsibilities include testing and validating software applications to ensure they meet quality standards. He previously served as an Associate Software Engineer at Altimetrik for one year, gaining valuable experience in software development and quality assurance.
Education and Expertise
Sooraj J P earned a Bachelor of Engineering degree in Electrical, Electronic, and Communications Engineering from Velammal College of Engineering & Technology, Madurai, from 2015 to 2019. He also completed his Higher Secondary Certificate (HSC) and Secondary School Certificate (SSC) at TVS Matriculation Higher Secondary School, where he studied Computer Science.
Consulting Experience
Sooraj J P has experience as a consultant, where he was involved in testing Silicon Valley Bank's online banking web application, mobile application, and APIs. This role required him to apply his technical skills in a practical setting, ensuring the functionality and security of critical banking applications.
Interests in Finance and VLSI
In addition to his engineering roles, Sooraj J P has a keen interest in personal finance and engages in part-time stock trading and options writing, focusing on both Indian and US markets. He is also exploring the field of Physical Design Engineering in VLSI, concentrating on the challenges of balancing timing, performance, and area in design processes.