Xiaofan Ruan
About Xiaofan Ruan
Xiaofan Ruan is a Member of Technical Staff specializing in Design Verification at Cerebras Systems, with a strong background in deep learning and digital IC design. He has worked in various research and engineering roles across multiple countries and holds degrees in Electrical and Computer Engineering.
Work at Cerebras Systems
Xiaofan Ruan has been employed at Cerebras Systems as a Member of Technical Staff in Design Verification since 2019. In this role, he focuses on ensuring the reliability and performance of the company's advanced computing systems. His work contributes to the development of innovative solutions in the field of deep learning.
Experience in ASIC Verification
Prior to his current position, Xiaofan Ruan worked at Marvell Semiconductor as a Senior ASIC Verification Engineer from 2013 to 2019. His responsibilities included developing and implementing verification strategies for application-specific integrated circuits (ASICs). This role allowed him to gain significant expertise in constrained random verification and RTL debugging.
Educational Background
Xiaofan Ruan completed his Bachelor of Engineering (B.Eng.) in Electrical and Computer Engineering at the National University of Singapore from 2007 to 2012. He furthered his education by obtaining a Master of Engineering (M.Eng.) in the same field from the National University of Singapore from 2012 to 2013. Additionally, he earned a Diplôme d'ingénieur from École Supérieure d'Électricité, studying Electrical and Computer Engineering from 2009 to 2013.
Research Experience
Xiaofan Ruan has held various research positions throughout his career. He served as an Undergraduate Research Assistant at Imperial College London for two months in 2009. He also worked as a Research Intern at CEA in Grenoble, France, for four months in 2011. Furthermore, he was a Research Student at the National University of Singapore from 2012 to 2013.
Part-time Deep Learning Engineer
In addition to his full-time roles, Xiaofan Ruan has been working as an Independent Engineer, serving as a Part-time Deep Learning Engineer since 2016. This position allows him to apply his knowledge of deep learning and digital IC design while continuing to develop his skills in the field.