Siam Umar Hussain
About Siam Umar Hussain
Siam Umar Hussain is a Research Engineer at Chainlink Labs, specializing in cryptographic protocols and privacy-sensitive applications. He holds a PhD in Computer Engineering from the University of California, San Diego, and has extensive experience in research and development across various prestigious institutions.
Work at Chainlink Labs
Siam Umar Hussain has been employed at Chainlink Labs as a Research Engineer since 2021. His role involves advancing cryptographic protocols and privacy-sensitive applications. He previously served as a Research Intern at Chainlink Labs for three months in 2021, where he contributed to the development of secure computation frameworks. His current projects include the acceleration of Oblivious Transfer and Homomorphic Encryption, as well as the development of an automated mixed protocol framework that integrates various cryptographic techniques.
Education and Expertise
Siam Umar Hussain holds a Doctor of Philosophy (PhD) in Electrical and Computer Engineering from the University of California, San Diego, which he completed from 2016 to 2021. He also earned a Master of Science (M.S.) in Electrical and Computer Engineering from Rice University, studying there from 2013 to 2015. Additionally, he obtained a Bachelor of Science (B.Sc) Honours in Electrical and Electronic Engineering from Bangladesh University of Engineering and Technology, where he studied from 2006 to 2011. His academic background supports his expertise in cryptographic protocols and privacy-sensitive applications.
Background
Before joining Chainlink Labs, Siam Umar Hussain gained experience in various roles. He worked as a Graduate Student Researcher at the University of California, San Diego from 2016 to 2021, where he focused on cryptographic research. He also served as a Graduate Technical Intern at Intel Corporation in 2019 and as a Hardware Engineer Intern at Qualcomm in 2018. His earlier experience includes a position as a Software Engineer at Samsung Bangladesh R&D Center from 2011 to 2012.
Research and Development Contributions
Siam Umar Hussain's research contributions include the development of the fastest FPGA accelerator for Garbled Circuit and the creation of a Yao's Garbled Circuit framework for Intel Labs, known as TinyGarble2.0, which is available on GitHub. His work encompasses the co-optimization of cryptographic protocols and the development of several open-source frameworks for secure Multi-Party Computation (MPC). His research interests also extend to oblivious Machine Learning inference and the creation of MPC-based applications.
Current Research Focus
Siam Umar Hussain's primary research focus is on enabling data-intensive systems with provable privacy guarantees in practical settings. He is currently engaged in projects that involve the integration of Garbled Circuit, Arithmetic Sharing, and Homomorphic Encryption. His research aims to address challenges in cryptographic protocols and enhance privacy-sensitive applications, such as authentication with noisy keys and secure localization.