Art Enyedy
About Art Enyedy
Art Enyedy is a Senior Digital Design Engineer with extensive experience in high-speed design of complex FPGAs and ASICs. He has worked at Impinj for 19 years and has held various engineering roles in telecommunications since the 1980s.
Current Role at Impinj
Art Enyedy currently serves as a Senior Digital Design Engineer at Impinj. He has held this position since 2005, contributing to the development of advanced digital designs. His role involves high-level responsibilities in the design and implementation of digital systems, particularly in the context of RFID technology.
Previous Experience at Impinj
Prior to his current role, Art Enyedy worked at Impinj from 2005 to 2012 as an FPGA Design Engineer. During this time, he was responsible for the digital implementation of key components such as transmitters, receivers, data filters, command sequencers, and low-level processing for Speedway readers.
Professional Background in FPGA and ASIC Design
Art Enyedy has extensive experience in FPGA and ASIC design, having worked at Mahi Networks as a Senior FPGA/ASIC Designer from 2000 to 2005. His responsibilities included the design and implementation of complex digital systems. He also worked at TRW as an ASIC/FPGA designer from 1983 to 1994 and at Motorola (formerly General Instruments) as a Board Designer from 1994 to 1996.
Education and Qualifications
Art Enyedy holds a Bachelor of Science in Electrical Engineering (BSEE) from the University of Notre Dame and a Master of Science in Electrical Engineering (MSEE) from the University of Southern California. His educational background provides a strong foundation for his expertise in digital design and telecommunications.
Expertise in Telecommunications
Art Enyedy specializes in high-speed design of complex FPGAs and ASICs, with significant experience in telecommunications. His knowledge encompasses SONET STS-1s, VT1.5, DS3, and DS1, which are critical in the field of digital communications.