Edward Jay Galorport
About Edward Jay Galorport
Edward Jay Galorport is a Facilities Engineer at J.D. Irving, Limited, with over 14 years of experience in the semiconductor manufacturing industry. He has a strong background in test supply chain management and has held various engineering roles in companies such as GLOBALFOUNDRIES and Fairchild.
Current Role at J.D. Irving
Edward Jay Galorport currently serves as a Facilities Engineer in the J.D. Irving IT Division. He has held this position since 2021 and is responsible for managing various test-related matters, including overseeing test program releases and facilitating the bring-up of test hardware. His role involves ensuring that facilities are equipped to support the company's technological needs.
Previous Experience at J.D. Irving
Before his current role, Edward worked as a Technical Analyst in Facilities Management within the IT Division at J.D. Irving, Limited from 2018 to 2021. During this period, he contributed to the management of facilities and supported IT operations, leveraging his engineering background to enhance efficiency and effectiveness in the division.
Professional Background in Semiconductor Industry
Edward has over 14 years of experience in the semiconductor manufacturing industry. He has specialized in test supply chain management and new device enablement. His previous roles include serving as a Senior Product Engineer at GLOBALFOUNDRIES from 2011 to 2017 and as an Intermediate Product Engineer at Fairchild, now part of ON Semiconductor, from 2005 to 2010.
Education and Certifications
Edward earned a Bachelor of Science in Electronics and Communications Engineering from the University of San Carlos, studying from 1997 to 2002. He also completed the Six-Sigma Green Belt Program in 2017 through The Learning Resources Network in partnership with the University of New Brunswick. His educational background supports his expertise in statistical analysis and quality management systems.
Technical Skills and Proficiencies
Edward is proficient in using statistical analysis tools such as JMP and Engineering Workbench for data analysis. He has advanced expertise in MOSFET and PMIC device testing and is skilled in programming languages including Macro, Visual Basic, and C/C++. Additionally, he has experience with Automated Test Equipment like Teradyne IFLEX and UFLEX test systems.