Athanasios Grassos
About Athanasios Grassos
Athanasios Grassos is a Chip Design Lead with extensive experience in chip design tools and power analysis. He has worked at several prominent companies, including ARM and Imagination Technologies, and holds degrees in Electrical and Computer Engineering and Mathematics.
Current Role at Lemurian Labs
Athanasios Grassos serves as the Chip Design Lead at Lemurian Labs in Athens, Attiki, Greece. He has held this position since 2022. In this role, he applies his extensive knowledge in chip design and power management to lead projects and guide teams in developing innovative solutions.
Professional Experience in Chip Design
Grassos has significant experience in the field of chip design, having previously worked at various companies in roles such as Senior Implementation Engineer at ARM and Senior Physical Design Engineer at u-blox. His work has involved utilizing tools like the Synopsys Design Compiler suite and static power check tools, contributing to his expertise in timing and power analysis.
Educational Background
Grassos holds a Master of Science in Mathematics from Birkbeck, University of London, which he completed from 2016 to 2019. He also earned a Diploma in Electronics Design from the University of Glasgow, studying there from 2010 to 2012. Additionally, he obtained a Diploma in Electrical and Computer Engineering from the University of Patras, where he studied from 2004 to 2010.
Technical Skills and Tools
Grassos possesses strong technical skills in various tools and programming languages. He has extensive experience with the Synopsys Design Compiler tool suite, PrimeTime, and PrimeTimePx, as well as scripting skills in Python and TCL for automation. He is knowledgeable in using version control systems like Perforce and has a working knowledge of both Unix and Windows operating systems.
Experience with Advanced Process Nodes
Grassos has worked with advanced process nodes, including 40nm, 28nm, and 20nm technologies. He has experience optimizing leakage using Multi-Vt and Multi-Channel length libraries, demonstrating his capability in handling complex design challenges in modern chip development.