Moulay Driss Lemrhari
About Moulay Driss Lemrhari
Moulay Driss Lemrhari is a Thin Film Deposition Process Engineer at Murata in Caen, France, where he has worked since 2017. He specializes in various deposition processes and trains operators on internal procedures.
Work at Murata
Moulay Driss Lemrhari has been employed at Murata since 2017 as a Thin Film Deposition Process Engineer. He operates from the company's facility in Caen, Basse-Normandie, France. His responsibilities include training operators and technicians on internal processes related to thin film deposition. He is also responsible for maintaining internal technical documentation for the Thin Film Cluster at Murata Integrated Passive Solution. His expertise includes PECVD processes for silicon nitride and oxide layers, as well as electrochemical deposition processes, specifically Cu pillar deposition.
Education and Expertise
Moulay Driss Lemrhari studied at the Institut national des Sciences appliquées de Rennes, where he earned a Diplôme d'ingénieur in Sciences et Génie des Matériaux from 2012 to 2017. He is currently pursuing further education at Tampere University of Technology, focusing on Photonics, Laser Physics, Microsensors, and Semiconductor Technology since 2016. His educational background has equipped him with specialized knowledge in thin film deposition processes and semiconductor technologies.
Background
Before joining Murata, Moulay Driss Lemrhari gained experience through various internships. He worked as an Operating Intern at Cooper Standard in 2013 for one month and as a Characterization Intern at IPDiA in 2016 for two months. Additionally, he served as a Characterization & Test Intern at Trixell in 2017 for five months. These roles provided him with practical insights into materials characterization and testing, contributing to his professional development in the field.
Technical Skills
Moulay Driss Lemrhari specializes in several technical processes related to thin film deposition. He is proficient in Electroless UBM (ENIG) deposition processes on 6-inch wafers, emphasizing production, quality, and development. His skill set includes handling PVD sputtering processes for various metal layers and engaging in silicon epitaxial growth processes as part of front-end operations. This expertise allows him to contribute effectively to the advancement of semiconductor technologies.