Anatoliy Ptashko
About Anatoliy Ptashko
Anatoliy Ptashko is a Principal Engineer at ON Semiconductor with extensive experience in ASIC design and verification. He holds both a Bachelor of Science and a Master of Science in Electrical and Electronics Engineering from the National Research Nuclear University MEPhI.
Work at ON Semiconductor
Anatoliy Ptashko has been employed at ON Semiconductor as a Principal Engineer since 2020. In this role, he focuses on the design and verification of integrated circuits, leveraging his extensive background in ASIC design and system performance analysis. His responsibilities include overseeing projects that require a deep understanding of micro-architecture and high-speed peripheral interfaces.
Previous Experience in ASIC Design
Prior to his current position, Anatoliy Ptashko held various roles at Moscow Center of SPARC Technologies. He started as an ASIC Design Intern from 2005 to 2006, progressed to an ASIC Design Engineer from 2006 to 2010, and later served as a Senior Design Engineer from 2010 to 2014. His work involved integrating SoC IP blocks and developing high-speed peripherals such as PCIe and USB.
Experience at Baikal Electronics
Anatoliy Ptashko worked as a Senior ASIC Design Engineer at Baikal Electronics from 2014 to 2015. During this time, he contributed to the development of advanced ASIC designs, applying his skills in FPGA-based prototyping and verification methodologies.
Education and Expertise
Anatoliy Ptashko earned a Bachelor of Science (B.S.) in Electrical and Electronics Engineering from the National Research Nuclear University MEPhI from 2000 to 2004. He furthered his education by obtaining a Master of Science (M.S.) in the same field from 2004 to 2006. His academic background supports his expertise in digital IC design, system performance analysis, and the use of UVM for verification.
Technical Skills and Proficiencies
Anatoliy Ptashko possesses a range of technical skills relevant to ASIC design and verification. He is skilled in integrating MIPS and RISCV processor cores into SoC designs. His experience includes high-speed peripheral design, FPGA-based prototyping, and proficiency in using UVM for constrained random verification.