Auringzaib Sabir
About Auringzaib Sabir
Auringzaib Sabir is a Design Verification Engineer currently working at onsemi in Ireland. He has a background in hardware engineering and has contributed to various projects, including the verification of RISC-V based systems and Smart network interface cards.
Current Role at Onsemi
Auringzaib Sabir currently serves as a Design Verification Engineer at Onsemi, a position he has held since 2022. His work is based in Ireland and involves on-site responsibilities. In this role, he is engaged in the verification of Smart Network Interface Cards (SmartNICs) as part of commercial projects, ensuring the functionality and reliability of these advanced networking components.
Previous Experience at DreamBig Semiconductor Inc.
Before joining Onsemi, Auringzaib Sabir worked as a Hardware Engineer at DreamBig Semiconductor Inc. from 2019 to 2021. During his two-year tenure, he contributed to various hardware projects, gaining valuable experience in the semiconductor industry. This role allowed him to develop his skills in hardware design and verification.
Educational Background
Auringzaib Sabir has a solid educational foundation in engineering. He studied at NED University of Engineering and Technology, where he earned a Bachelor of Engineering in Electrical and Electronics from 2015 to 2019. Prior to this, he completed his Intermediate studies in Pre-Engineering at St. Patrick's College, starting in 2015. His early education was completed at St. Johns High School, where he achieved Matric in Science.
Internship Experience
Auringzaib Sabir has gained practical experience through various internships. In 2019, he interned at Mehran Sugar Mills Limited for one month in Tando Allahyar. Earlier, in 2017, he completed a one-month internship at The General Tyre and Rubber Company of Pakistan Limited in Karachi. These internships provided him with insights into the engineering field and contributed to his professional development.
Technical Expertise and Contributions
Auringzaib Sabir possesses expertise in using Electronic Design Automation (EDA) tools, including Cadence Xcelium, Cadence IMC, Synopsys VCS, and Questasim. He has skills in verifying various peripheral devices and protocols such as PCIe, CXL, QDMA, SPI, UART, I2C, and PWM. Additionally, he contributed to the verification of a RISC-V based SoC named AZADI SoC, which was funded by Google, and worked on the verification of the BURAQ core as part of open-source projects.