Geeta Dhingra
About Geeta Dhingra
Geeta Dhingra is a Senior Layout Designer with extensive experience in chip design, currently working at Renesas Electronics in Milpitas, California. She has held various positions in the industry since 1998, demonstrating expertise in RF/Analog Mixed Signal Design and proficiency in multiple verification tools.
Work at Renesas Electronics
Geeta Dhingra has been employed at Renesas Electronics as a Senior Layout Designer since 2018. In this role, she is responsible for various aspects of layout design, contributing to the development of advanced semiconductor technologies. Her work involves managing projects from floorplanning to tapeout, demonstrating her comprehensive skill set in chip design and project management.
Previous Experience in Semiconductor Industry
Prior to her current position, Geeta Dhingra held several significant roles in the semiconductor industry. She worked at Alien Technology as a Senior Staff Layout Engineer for one year from 2012 to 2013. Before that, she spent nine years at Micrel as a Senior Mask Designer from 1998 to 2007, followed by five years at Intersil in the same capacity from 2007 to 2012. Additionally, she was employed at IDT as a Staff Layout/Mask Designer from 2013 to 2016.
Education and Expertise
Geeta Dhingra studied at Punjab Technical University, where she earned a Master of Science (MSc) in Biochemistry from 1979 to 1983. She also attended Punjab University in Chandigarh and Martin Thrasher. Her educational background is complemented by her expertise in RF/Analog Mixed Signal Design using CMOS, BICMOS, and Bipolar technologies.
Technical Skills and Tools Proficiency
Geeta Dhingra possesses extensive experience with various verification and layout design tools. She is proficient in using Cadence 6.1.7 VXL tools for layout design, as well as verification tools such as Assura and Calibre. Additionally, she has experience with Dracula and Diva verification tools, indicating her broad knowledge of verification methodologies.