Jerome Teysseyre
About Jerome Teysseyre
Jerome Teysseyre serves as the Vice President and Head of Package Development and Engineering at onsemi, where he focuses on system in package solutions for cloud and server applications. With extensive experience in packaging technologies and a background in materials engineering, he has held various leadership roles in the semiconductor industry since 2000.
Current Role at Onsemi
Jerome Teysseyre serves as the Vice President and Head of Package Development and Engineering at Onsemi, a position he has held since 2023. He is based in Singapore and focuses on advancing system in package solutions tailored for cloud and server applications. His leadership in this role emphasizes the integration of front-end and back-end applications into cohesive products, enhancing Onsemi's capabilities in the semiconductor industry.
Previous Experience at Fairchild and Onsemi
Prior to his current role, Jerome Teysseyre worked at Fairchild, which is now part of Onsemi, as Vice President of Assembly Technology and Package Development Group from 2014 to 2017. He then transitioned to Onsemi, where he served as Vice President of Package Development from 2017 to 2020 in Phoenix, Arizona. His extensive experience in package development has contributed significantly to the company's advancements in semiconductor technology.
Background in Assembly Technologies
Jerome Teysseyre has a solid foundation in assembly technologies, having worked at STMicroelectronics as an R&D Manager from 2000 to 2009 in Grenoble, France. He later held the position of Director of Corporate Packaging and Automation at STMicroelectronics from 2010 to 2014 in Singapore. His roles have involved managing teams focused on packaging innovations and automation processes, which have been critical in the development of advanced semiconductor solutions.
Expertise in Packaging Solutions
Jerome Teysseyre possesses specialized expertise in developing dual cool packages with voltage ratings ranging from 10 to 1200V. He is recognized for his work in wafer level packaging integration and has a broad portfolio in power integrated circuits (ICs). His focus on automotive and consumer camera image sensors highlights his versatility in the semiconductor field.
Education and Qualifications
Jerome Teysseyre earned a Master of Engineering (MEng) in Materials Engineering from Polytech Grenoble. His educational background provides a strong foundation for his extensive career in semiconductor packaging and development, equipping him with the necessary skills to lead innovative projects in the industry.