Maurice O'carroll
About Maurice O'carroll
Maurice O'Carroll is a Senior Layout Designer with extensive experience in layout design and project leadership. He has worked at ON Semiconductor since 2021 and has previously held positions at Xilinx and Analog Devices.
Work at ON Semiconductor
Currently, Maurice O'Carroll holds the position of Senior Layout Designer at ON Semiconductor. He has been in this role since 2021, contributing to various layout design projects. In addition to his design responsibilities, he has taken on a Lead Layout project role, where he coordinates and supports a team of layout personnel across multiple sites. His experience in this position enhances the efficiency and quality of layout designs within the organization.
Previous Experience at Xilinx
Before joining ON Semiconductor, Maurice O'Carroll worked as an IC Layout Engineer at Xilinx from 2019 to 2021. His role involved designing integrated circuits, where he applied his technical skills in layout design. This position provided him with valuable experience in the semiconductor industry, particularly in the development of advanced technologies.
Experience at Analog Devices
Maurice O'Carroll served as a Layout Engineer at Analog Devices from 2016 to 2019. During his time there, he focused on layout design, contributing to the development of various electronic components. This role helped him build a strong foundation in layout engineering and furthered his expertise in the field.
Education and Expertise
Maurice O'Carroll studied at the Institute of Technology, Carlow, where he earned an Honours Degree in Electronic Systems Engineering from 2013 to 2016. His education provided him with a solid understanding of electrical, electronic, and communications engineering technology. Additionally, he completed his Leaving Certificate at St. Mary's CBS Enniscorthy from 2004 to 2009, which laid the groundwork for his technical education.
Technical Skills and Specializations
Maurice O'Carroll possesses extensive experience working with advanced process nodes, including 7nm FinFet technology. His background encompasses both low-level layout design and leadership roles within layout projects. This combination of skills allows him to effectively manage projects while maintaining a high standard of technical execution.