Nisha T T
About Nisha T T
Nisha T T is an Analog Layout Engineer at onsemi in India, with expertise in ASIC flow and analog layout techniques. She has a background in electronics and communication engineering, along with experience in various roles within the semiconductor industry and academia.
Work at Onsemi
Nisha T T has been employed at onsemi as an Analog Layout Engineer since 2022. In this role, she focuses on analog layout techniques and ASIC flow, contributing to the development of integrated circuits. Her work is based in India, where she has been part of the team for two years.
Previous Experience at Micron Technology
Before joining onsemi, Nisha worked at Micron Technology as a Layout Design Engineer from 2019 to 2022. During her three years at the company, she gained valuable experience in layout design, further enhancing her skills in the semiconductor industry. Her tenure at Micron was based in Hyderabad, Telangana, India.
Education and Expertise
Nisha holds a Bachelor of Engineering (BE) degree in Electronics and Communication Engineering from Visvesvaraya Technological University, which she completed from 2005 to 2009. She also earned a Master of Technology (M.Tech) in Power Electronics from RV College of Engineering, studying from 2009 to 2011. Her educational background provides a strong foundation for her expertise in analog layout and ASIC design.
Teaching Experience at PES University
Nisha served as an Assistant Professor at PES University from 2013 to 2018. In this role, she contributed to the academic development of students in the field of electronics. Her five years of teaching experience allowed her to share her knowledge and expertise in various engineering subjects.
Technical Skills and Knowledge
Nisha demonstrates expertise in analyzing various failure mechanisms, including shielding, latch-up, antenna effect, ESD, and electro-migration. She possesses a strong understanding of IC verification terminologies such as DRC, LVS, PEX, and ERC. Her experience spans multiple technology nodes, including 180nm, 90nm, and 28nm processes, showcasing her technical proficiency in layout design.