Amit Kumar
About Amit Kumar
Amit Kumar serves as the Lead Member of Technical Staff at Rambus, where he has worked since 2021. He has extensive experience in ASIC verification and holds advanced degrees in Microelectronics and Business Administration from Birla Institute of Technology and Science, Pilani.
Work at Rambus
Amit Kumar has been employed at Rambus since 2021, currently holding the position of Lead Member of Technical Staff. His tenure at Rambus includes a previous role as Senior Member of Technical Staff II from 2018 to 2021. During his time at the company, he has contributed to various projects, focusing on verification processes and technical leadership.
Education and Expertise
Amit Kumar holds a Master of Technology (MTech) in Microelectronics from the Birla Institute of Technology and Science, Pilani, which he completed from 2017 to 2019. He also earned a Master of Business Administration (MBA) from the same institution from 2019 to 2021. Prior to this, he obtained a Bachelor of Technology (B.Tech.) in Electronics and Telecommunication Engineering from the Silicon Institute of Technology, Bhubaneswar, from 2007 to 2011. His educational background supports his expertise in various protocol categories, including PCIE Gen1-5, CXL 2.0, and SATA.
Background
Before joining Rambus, Amit Kumar worked at Semtech, where he held multiple positions, including ASIC Verification Engineer level 2 from 2014 to 2016 and ASIC Verification Engineer level 1 from 2012 to 2014. He began his career at Gennum Corporation as an ASIC Trainee Engineer from 2011 to 2012. His experience spans across different roles in verification and engineering, primarily in the semiconductor industry.
Technical Skills and Projects
Amit Kumar possesses extensive technical skills in verification, having led verification for over 15 successful taped out projects. He has experience with high-speed data transmission verification, specifically verifying PHYs up to 112Gbps. His technical capabilities include working with Register-description Language (RDL) and Blueprint, as well as developing automation tools for verification testbench auto-generation using Python. He has also implemented SV-DPI for firmware verification, showcasing his ability to integrate software and hardware verification processes.