Jitendra Tandon
About Jitendra Tandon
Jitendra Tandon is a SMTS Logic Design Engineer at Rambus, specializing in micro-architecture and front-end digital design for advanced memory technologies. He holds a Bachelor's degree in Electronics and Communications Engineering and a Master's degree in Electronic Systems from prestigious institutions in India.
Current Role at Rambus
Jitendra Tandon currently serves as a Senior Member of Technical Staff (SMTS) Logic Design Engineer at Rambus, a position he has held since 2017. He is based in the Bengaluru Area, India. In this role, he focuses on the micro-architecture of High Bandwidth Memory (HBM2) and DDR PHY, contributing to the advancement of memory technologies. His work involves specialized tasks in RTL design and timing closure, which are critical for the performance of high-bandwidth memory interfaces.
Previous Experience at Rambus
Before his current position, Jitendra Tandon worked at Rambus as a Member of Technical Staff (MTS) from 2013 to 2017. During this four-year tenure in Bangalore, he gained valuable experience in the field of digital design and memory technologies. His contributions during this period laid the groundwork for his subsequent role as a Senior Member of Technical Staff.
Education and Expertise
Jitendra Tandon holds a Master's degree in Electronic Systems from the Indian Institute of Technology, Bombay, which he completed from 2011 to 2013. Prior to that, he earned a Bachelor of Engineering (B.E.) in Electronics and Communications Engineering from Ujjain Engineering College, studying from 2007 to 2011. His educational background is complemented by a foundational education in Maths and Science from JNVK Ratlam, where he completed his 12th grade from 2004 to 2007.
Technical Specialization
Jitendra Tandon specializes in the micro-architecture and front-end digital design of Memory PHY IPs, including DDR, HBM2, and LPDDR. With over five years of experience in this area, he focuses on RTL design and timing closure, which are essential for developing efficient and high-performance memory interfaces. His expertise contributes significantly to the advancement of memory technology.