Kapil Vyas
About Kapil Vyas
Kapil Vyas is the Director of Engineering at Rambus, where he has worked since 2022. He has a strong background in VLSI circuit design and holds a B.E. from S.G.S.I.T.S. and an M.Tech. from the Indian Institute of Science.
Current Role at Rambus
Kapil Vyas serves as the Director of Engineering at Rambus, a position he has held since 2022. In this role, he focuses on the development of next-generation high-speed DDR memory buffer and retimer products. His leadership contributes to the advancement of technology within the company, leveraging his extensive experience in engineering and design.
Previous Experience at Rambus
Before his current role, Kapil Vyas worked at Rambus from 2005 to 2013 as a PE - Circuit Design Engineer. He later returned to the company as a Senior Engineering Manager from 2017 to 2022. His tenure at Rambus spans a total of eight years, during which he gained significant expertise in VLSI circuit design and system validation.
Experience at Cadence Design Systems
Kapil Vyas was employed at Cadence Design Systems as a Principal Design Engineer from 2015 to 2017. His work in this role contributed to the development of design solutions in the engineering sector, enhancing his skills in circuit design and engineering management.
Educational Background
Kapil Vyas earned his Bachelor of Engineering (B.E.) degree in Electronics and Telecommunication from S.G.S.I.T.S. - Indore, studying from 1999 to 2003. He furthered his education at the Indian Institute of Science (IISc), where he completed a Master of Technology (M.Tech.) in Electronics Design and Technology from 2003 to 2005. This educational foundation supports his expertise in VLSI and circuit design.
Technical Skills and Expertise
Kapil Vyas possesses a strong background in VLSI circuit design, interfaces architecture, and system validation. He is proficient in programming and scripting, which enhances his hardware expertise. His technical skills are instrumental in his current focus on high-speed memory products.