Leo John Thomas
About Leo John Thomas
Leo John Thomas is a Senior Principal Engineer specializing in ASIC design, with expertise in advanced node memory compilers, RF, and TCAM. He has held various engineering roles at prominent companies including Rambus, Arm, and Intel, and has a strong background in IP integration and qualification flows.
Current Role at Rambus
Leo John Thomas currently serves as a Senior Principal Engineer in ASIC Design at Rambus, a position he has held since 2023. In this role, he focuses on advanced node memory compilers, specifically in RF and TCAM technologies. His expertise includes IP integration and qualification flows for various types of intellectual properties. Thomas's contributions to Rambus are informed by his extensive background in ASIC design and development.
Previous Experience at Rambus
Prior to his current role, Leo John Thomas worked at Rambus as a Principal Engineer in ASIC Design from 2021 to 2023. He also held the position of Senior Member of Technical Staff II in CAD/EDA at Rambus from 2018 to 2021. His tenure at Rambus has provided him with a solid foundation in ASIC design and development, contributing to his current expertise.
Professional Background in ASIC Design
Leo John Thomas has a diverse professional background in ASIC design, having worked at several leading technology companies. He was a Component Design Engineer at Intel Corporation from 2012 to 2015, focusing on PDK development and custom routing methodologies. He also contributed to memory compiler design and automatic design integration at Intel from 2015 to 2018. His experience includes roles at Arm and Renesas Electronics, where he specialized in design automation.
Educational Qualifications
Leo John Thomas holds a Bachelor of Technology (B.Tech.) in Electrical, Electronics and Communications Engineering from Mahatma Gandhi University, which he completed from 2004 to 2008. He also achieved a Higher Secondary qualification in Physical Sciences (Electronics) from IHRD THSS, Mallappally, between 2002 and 2004. His educational background laid the groundwork for his career in engineering and technology.
Expertise in Design Automation
Leo John Thomas possesses extensive expertise in design automation, particularly in developing custom device-level routing engines and memory compilers. His knowledge encompasses process migration and pCell development, as well as the development of logic and fill cell layout synthesizers. This technical proficiency supports his work in ASIC design and enhances his contributions to the field.