Nitika Jaiswal
About Nitika Jaiswal
Nitika Jaiswal is an experienced engineer specializing in logic verification, currently serving as MTS - Logic Verification Engineering at Rambus in Bengaluru. She has a strong background in Verilog, SystemVerilog, and UVM, with over six years of experience in the field.
Current Role in Logic Verification Engineering
Nitika Jaiswal currently holds the position of MTS - Logic Verification Engineering at Rambus, where she has worked since 2020. Her role is based in IBC Knowledge Park, Bengaluru. In this capacity, she focuses on high-speed multi-protocol SerDes verification, leveraging her extensive experience in logic verification engineering.
Previous Experience at Rambus
Prior to her current role, Nitika Jaiswal worked at Rambus as AMTS - Logic Verification Engineering from 2018 to 2020. This two-year tenure allowed her to deepen her expertise in logic verification processes. Additionally, she served as a Verification Consultant at Rambus for nine months in 2017, contributing to various projects during her time there.
Educational Background in Electronics and Communications Engineering
Nitika Jaiswal completed her Bachelor of Engineering in Electronics and Communications Engineering at Tribhuvan University from 2010 to 2014. This educational foundation provided her with essential knowledge and skills applicable to her career in logic verification engineering.
Experience at Maven Silicon
In 2017, Nitika Jaiswal worked as a Logic Verification Trainee at Maven Silicon for seven months in Bengaluru, Karnataka, India. This role marked the beginning of her professional journey in logic verification, where she gained practical experience in the field.
Early Career at WorldLink Communications
Before entering the field of logic verification, Nitika Jaiswal worked as an IT Support Engineer at WorldLink Communications from 2015 to 2016 in Kathmandu, Nepal. This position provided her with foundational technical skills and experience in IT support.