Raja R I
About Raja R I
Raja R I is a Sr. Member Technical Staff at Rambus, specializing in high frequency and RF layouts with extensive experience in complex electronic designs. He has a background in Electronics and Communications Engineering and has worked in various roles at notable companies, demonstrating strong collaborative and technical skills.
Work at Rambus
Raja R I has been employed at Rambus as a Senior Member Technical Staff - Layout since 2018. In this role, he specializes in high frequency and RF layouts, contributing to complex electronic designs. His responsibilities include regular collaboration with circuit designers to ensure layout designs align with required specifications. This position highlights his ability to work effectively in a team-oriented environment while maintaining a focus on technical precision.
Previous Experience at Mirafra Technologies
Before joining Rambus, Raja R I worked at Mirafra Technologies as a Senior Layout Design Engineer from 2016 to 2018. In this capacity, he further developed his expertise in layout design, focusing on the intricacies of electronic circuit layouts. His tenure at Mirafra Technologies allowed him to refine his skills in handling complex design challenges.
Background in Electronics and Communications Engineering
Raja R I earned a Bachelor’s Degree in Electronics and Communications Engineering from Mar Baselios College of Engineering & Technology in Trivandrum. His studies spanned from 2008 to 2012, providing him with a solid foundation in the principles of electronics and communications, which he has applied throughout his professional career.
Experience at QuEST Global
Raja R I's professional journey includes a role at QuEST Global, where he served as a Design Engineer from 2013 to 2016. During this time, he gained valuable experience in design engineering, contributing to various projects and enhancing his technical skills in the field of integrated circuit design.
Technical Skills and Expertise
Raja R I possesses a strong understanding of analog layout concepts, including matching, shielding, and parasitics, which are essential for optimizing circuit performance. He has hands-on experience with technology nodes as advanced as 5nm and is proficient in full custom analog layout, IO cell, and standard cell layout. His technical toolkit includes advanced design tools such as Cadence Layout L & XL, Modgen, Mentor Graphics Calibre, and Synopsis IC Validator.