Rajesh Vissarapu
About Rajesh Vissarapu
Rajesh Vissarapu is a PE Logic Design Engineer with extensive experience in ASIC design and customer support. He has worked at several prominent companies, including Broadcom Limited and Samsung Electronics, and is known for his mentorship and problem-solving skills.
Work at Rambus
Rajesh Vissarapu has been employed at Rambus as a PE Logic Design Engineer since 2020. In this role, he contributes to the design and development of logic systems, leveraging his extensive background in ASIC design and engineering. His responsibilities include providing customer support and mentoring junior engineers, ensuring knowledge transfer and skill development within the team.
Previous Experience at Broadcom Limited
Prior to his current role, Rajesh worked at Broadcom Limited as an ASIC DvDs Engineer Senior from 2012 to 2017. During his five years in this position, he was based in Bangalore and focused on various aspects of ASIC design. His work involved upgrading existing DDR PHY IP to support different generations, showcasing his ability to adapt to new protocols.
Educational Background in VLSI Design
Rajesh Vissarapu studied at the Sandeepani School of VLSI Design, where he completed a PG Diploma in VLSI Design from 2005 to 2006. He also holds a Bachelor of Technology in Electrical and Electronics Engineering from Acharya Nagarjuna University, which he obtained between 2001 and 2005. His educational background provides a solid foundation for his career in semiconductor design and engineering.
Technical Expertise in Memory Interfaces
Rajesh possesses a strong understanding of high-speed memory interface specifications, including DDR2/3/4 and LPDDR2/3/4 JEDEC standards. His experience includes working on microcontroller-based IPs and digital interfaces for optical navigation sensors, where he gained proficiency in cross-domain interfacing with analog and physical design.
Leadership and Mentorship Skills
Throughout his career, Rajesh has demonstrated leadership capabilities, notably leading a team of engineers in the design and implementation of DDR/LPDDR PHY hard macro at Samsung. He is recognized for his ability to listen and understand problems from multiple perspectives, which aids in effective decision-making and enhances team collaboration.