Stephen De Long
About Stephen De Long
Stephen De Long is a Lead MTS Verification Engineer at Rambus, with a background in silicon design and a degree from Ryerson University. He has experience at AMD and General Motors, and he specializes in system-level verification and power optimization.
Work at Rambus
Stephen De Long currently serves as the Lead MTS Verification Engineer (EIT) at Rambus, a position he has held since 2022. He operates in the Greater Toronto Area, Canada, where he applies his expertise in system-level verification. His role involves ensuring the integrity and performance of hardware and firmware through advanced verification methodologies.
Previous Experience at AMD
Stephen De Long worked at AMD in various capacities from 2019 to 2022. He started as a Silicon Design Engineer II for two years in Markham, Ontario, before transitioning to the role of Sr. Silicon Design Engineer for four months. His work at AMD contributed to the development and optimization of silicon design processes.
Education and Expertise
Stephen De Long studied at Ryerson University from 2012 to 2018, where he earned his degree while focusing on projects such as a Capstone EDP Project on HEVC Edge Detection on a NoC FPGA, for which he received an award. He also attended Loyalist College, where he achieved an Electrical Techniques Diploma in Electrician studies. His expertise includes system-level verification using UVM, OVM, and CPP, with a focus on power optimization.
Internship at General Motors
Stephen De Long gained practical experience as a Summer Intern at General Motors from 2015 to 2016 in Oshawa. This internship provided him with insights into the automotive industry and contributed to his foundational skills in engineering.
Passion for Programming and Design
Stephen De Long has a strong passion for programming and design, particularly in multimedia, signal processing, and computer networking at the RTL level. His interests align with his professional work, where he applies his skills to enhance verification processes and optimize hardware performance.