Todd Forkner
About Todd Forkner
Todd Forkner is a Principal Engineer - Layout at Rambus, where he has worked since 2005. He has extensive experience in designing advanced electronic components and coordinating complex engineering projects across multiple locations.
Work at Rambus
Todd Forkner has served as Principal Engineer - Layout at Rambus since 2005. In this role, he focuses on the design and implementation of complex electronic components. His responsibilities include top-level memory inference and SERDES chip planning and assembly. He collaborates with teams located in North Carolina, California, and India to ensure the successful execution of projects. His extensive experience in the field has contributed to Rambus's advancements in high-speed data processing technologies.
Previous Experience at Intel Corporation
Todd Forkner worked at Intel Corporation for several years in various roles. He was a Senior Mask Designer from 2001 to 2004, where he contributed to the development of semiconductor manufacturing processes. Prior to that, he held the position of Self-sustaining Technician from 1996 to 1998, and he worked as a Mask Designer from 1998 to 1999. His experience at Intel provided him with a solid foundation in semiconductor design and manufacturing.
Education and Expertise
Todd Forkner studied at Oregon State University from 1991 to 1993. He has developed expertise in designing multi-tap Decision Feedback Equalizers (DFE) specifically for 40G applications. His technical skills include the design of complex components such as ring VCO PLL, LCPLL, CTLE, and LCVCO. He has worked with advanced process nodes, including 90nm, 45nm SOI, 32nm, 28nm, and 22nm, showcasing his proficiency in modern semiconductor technologies.
Technical Contributions
In his career, Todd Forkner has made significant contributions to the field of semiconductor design. He has been responsible for the planning and assembly of SERDES chips, which are critical for high-speed data communication. His work involves coordinating with multiple teams across different locations, highlighting his ability to manage complex projects in a collaborative environment. His technical contributions have played a role in advancing the capabilities of high-speed data processing.