Vivek Avachat
About Vivek Avachat
Vivek Avachat is a Manager of Logic Verification at Rambus, with extensive experience in the semiconductor industry and a strong background in engineering. He holds a Bachelor of Engineering in Electrical from Pune Vidhyarthi Griha's College and has worked in various roles across multiple companies over the past two decades.
Current Role at Rambus
Vivek Avachat serves as the Manager of Logic Verification at Rambus, a position he has held since 2019. In this role, he oversees verification processes and ensures the quality of logic designs. His responsibilities include managing teams and implementing advanced verification methodologies to enhance project outcomes. Rambus is known for its innovations in semiconductor technology, and Avachat's expertise contributes to the company's objectives in this field.
Previous Experience in the Semiconductor Industry
Prior to his current role, Vivek Avachat accumulated extensive experience in the semiconductor industry. He worked at Aricent as an Engineering Project Manager from 2013 to 2019, where he managed engineering projects and led teams in Bangalore. Before that, he held positions at KPIT Cummins Infosystems Limited as an Associate Project Lead from 2006 to 2011, and at Infosys as a Senior Technology Architect from 2011 to 2012. His experience spans various aspects of technology and project management.
Education and Qualifications
Vivek Avachat earned his Bachelor of Engineering (BE) in Electrical Engineering from Pune Vidhyarthi Griha's College of Engineering and Technology, completing his studies from 1994 to 1998. He also attended SP College for his Higher Secondary Certificate (HSC) in Science from 1992 to 1994, and NMV High School Pune for his Secondary School Certificate (SSC) in Science from 1985 to 1992. His educational background provides a solid foundation for his career in engineering and technology.
Technical Skills and Expertise
Vivek Avachat possesses a range of technical skills that are crucial in the semiconductor industry. He is proficient in Verilog, System Verilog, and Specman, which are essential for hardware description and verification. Additionally, he is skilled in Perl and Shell Scripting, which are important for automation tasks. His expertise also includes UVM and eRM methodologies, advanced verification techniques that enhance the efficiency and effectiveness of logic verification processes.
Career Progression and Roles
Vivek Avachat's career includes a series of progressively responsible roles in technology and engineering. He began as a Senior Project Engineer at Wipro Ltd. in 2004, followed by a position as SMTS at Network Programs from 2005 to 2006. He then transitioned to KPIT Cummins Infosystems Limited and Infosys, where he further developed his project management skills. His diverse experiences have shaped his current role at Rambus, where he applies his knowledge to lead verification efforts.