Ravi Kiran Vemuri
About Ravi Kiran Vemuri
Ravi Kiran Vemuri is a Principal Engineer at SiMa.ai with over 20 years of experience in ASIC/SoC verification and validation. He has held various engineering roles at companies such as Xilinx, BAE Systems, and Marvell Semiconductor, contributing to advanced chip development and programmable FPGA solutions.
Current Role at SiMa.ai
Ravi Kiran Vemuri serves as a Principal Engineer at SiMa.ai, a position he has held since 2020. His work focuses on advancing machine learning and artificial intelligence-based chip development. Based in the San Francisco Bay Area, he contributes to the design and implementation of innovative solutions that leverage his extensive experience in the field.
Previous Experience at Xilinx
Vemuri has a significant history with Xilinx, where he held multiple roles. He worked as a Design Engineering Manager from 2012 to 2017, overseeing design teams in Hyderabad, India. He also served as a Staff Design Engineer for a brief period in 2017. His contributions included working on programmable FPGA solutions such as ZYNQ and MPSoC across various technology nodes.
Professional Background in ASIC/SoC Verification
With over 20 years of experience, Vemuri specializes in ASIC/SoC verification, validation, and characterization. His expertise encompasses a variety of protocols and methodologies, including OVM/UVM verification methodologies and System Verilog Assertions (SVA). He has worked on projects involving memory-based protocols like DDR2 and NAND FLASH, as well as ARM-based protocols.
Educational Qualifications
Ravi Kiran Vemuri earned his Master of Science in Electrical Engineering from the South Dakota School of Mines and Technology, studying from 1999 to 2001. He also holds a Bachelor of Science in Electrical Engineering from Andhra University, where he studied from 1994 to 1998. His educational background provides a solid foundation for his extensive career in engineering.
Technical Skills and Expertise
Vemuri possesses a diverse skill set that includes proficiency in programming languages such as Verilog, System Verilog, and C. He is experienced with various simulators and tools, including NCSIM and VCS, and is adept in scripting languages like CSH, PERL, and TCL. His technical expertise also covers PCIe protocols, netlist/gate level simulation, and the use of tracking tools like JIRA and DOORS.