Hien Tran
About Hien Tran
Hien Tran is a Hardware Test Engineer at Smiths Detection, where he has worked since 2016. He has extensive experience in hardware engineering and testing, with previous roles at Dolby Laboratories and PerkinElmer.
Work at Smiths Detection
Hien Tran has been employed at Smiths Detection as a Hardware Test Engineer since 2016. In this role, he is responsible for conducting design verification and validation for CT scan systems. His work involves performing X-ray detector characterization, ensuring the reliability and accuracy of imaging systems. He utilizes his expertise in programming and hardware testing to support the development and enhancement of detection technologies.
Previous Experience at Dolby Laboratories
Prior to his current position, Hien Tran worked at Dolby Laboratories as a Senior Manufacturing Test Engineer from 2013 to 2016. His responsibilities included overseeing manufacturing test processes and ensuring product quality in Brisbane, CA. This role contributed to his extensive experience in hardware testing and quality assurance.
Background in Engineering
Hien Tran has a diverse background in engineering, having worked at PerkinElmer in various roles. He served as a Camera Design Engineer from 1999 to 2003 and later as a Production Engineer/Program Manager from 2003 to 2009. His experience in these positions provided him with a solid foundation in design and production processes within the electronics industry.
Education and Expertise
Hien Tran holds a Master of Science in Electrical Engineering (MSEE) from Northwestern Polytechnic University, where he studied VLSI Design from 2009 to 2011. He also completed mixed signal IC design courses at UC Santa Cruz and earned a Bachelor of Science in Electronics Engineering from HCM City University of Technology. His educational background supports his expertise in hardware design and programming, including skills in Verilog, VHDL, and microcontroller programming.
Technical Skills and Contributions
Hien Tran has developed real-time image processing algorithms for FPGA, including gray scale conversion and edge detection using the Sobel algorithm. He is proficient in PCB schematic and layout design using Altium, and he has experience with Modbus protocol and RS485 network communication. Additionally, he conducts signal analysis using Matlab scripting and has expertise in test automation on both Linux and Windows platforms using C++, Python, and Linux Shell.