Balasubrahmanya K
About Balasubrahmanya K
Balasubrahmanya K is a Senior Engineer specializing in ASIC Design at Synaptics Incorporated in Bengaluru, India, with over five years of experience in the field. He has a strong background in developing Video Codec IPs and possesses expertise in FPGA design and algorithm development.
Work at Synaptics
Balasubrahmanya K has been employed at Synaptics Incorporated since 2019, where he serves as a Senior Engineer in ASIC Design. His role involves the development and implementation of advanced ASIC designs, contributing to the company's projects in the Bengaluru Area, India. Prior to his current position, he worked as an ASIC Design Engineer at Synaptics from 2018 to 2019, gaining valuable experience in the field.
Previous Experience in ASIC Design
Before joining Synaptics, Balasubrahmanya K worked at CoreEL Technologies for a total of five years. He held the position of Senior Design Engineer from 2016 to 2018 and served as a Design Engineer from 2013 to 2016. His tenure at CoreEL Technologies allowed him to develop a strong foundation in ASIC design and engineering.
Education and Expertise
Balasubrahmanya K graduated with a Bachelor of Engineering (B.E) in Electronics and Communication Engineering from Sri Jayachamarajendra College of Engineering, Mysore, completing his studies from 2009 to 2013. He possesses expertise in developing Video Codec IPs, specifically H264 and H265, and has strong skills in developing test benches and verifying/debugging designs.
Technical Skills and Tools
Balasubrahmanya K has hands-on experience with FPGA design and algorithm development in C. He is familiar with industry-standard tools such as Xilinx ISE, Vivado, Altera Quartus, and Modelsim. His technical skills are complemented by a good understanding of video concepts and standards, which supports his work in ASIC design and development.