Harsh Shah
About Harsh Shah
Harsh Shah is a Design Verification Engineer at Synaptics Incorporated in the San Francisco Bay Area, where he has worked since 2019. He holds a Bachelor of Engineering in Electrical and Electronics Engineering from D.J. Sanghvi College of Engineering and a Master of Science in Computer Engineering from North Carolina State University.
Work at Synaptics
Harsh Shah has been employed at Synaptics Incorporated as a Design Verification Engineer since 2019. In this role, he contributes to the verification processes of design projects within the company. His position is based in the San Francisco Bay Area, where he has accumulated five years of experience in the field.
Education and Expertise
Harsh Shah completed his Bachelor of Engineering (B.E.) in Electrical and Electronics Engineering at D.J. Sanghvi College of Engineering from 2013 to 2017. He furthered his education by obtaining a Master of Science (MS) in Computer Engineering from North Carolina State University, studying from 2017 to 2019. His academic background provides a solid foundation in engineering principles and practices.
Technical Skills
Harsh Shah possesses extensive technical skills relevant to his role as a Design Verification Engineer. He is experienced with various software tools, including Modelsim, MATLAB, Synopsys Design Vision, and Proteus. Additionally, he has programming proficiency in multiple languages, such as Verilog, SystemVerilog, C++, Python, C, and CUDA, which enhances his capabilities in design verification.
Professional Background
With a focus on design verification, Harsh Shah has developed a professional background that integrates both hardware and software engineering. His education and work experience have equipped him with the necessary skills to effectively contribute to complex engineering projects in the technology sector.