Lokesh Kumar M
About Lokesh Kumar M
Lokesh Kumar M is a Senior Staff Engineer specializing in design for test (DFT) at Synaptics Incorporated, where he has worked since 2017. He has extensive experience in chip design, verification, and testing processes, with a background in various semiconductor companies.
Work at Synaptics
Lokesh Kumar M has been employed at Synaptics Incorporated as a Senior Staff Engineer in Design for Test (DFT) since 2017. In this role, he focuses on the design and development of at-speed testing and silicon bring-up processes. His contributions are integral to ensuring the reliability and performance of Synaptics' semiconductor products. The position is based in San Jose, California, where he has accumulated over seven years of experience in this capacity.
Previous Experience in Semiconductor Industry
Prior to his tenure at Synaptics, Lokesh Kumar M worked at Marvell Semiconductor in various roles. He served as a Senior Staff Engineer from 2015 to 2017 and previously held the position of Staff Engineer - DFT from 2007 to 2014. His experience at Marvell spans a total of nine years. Additionally, he briefly worked at Conexant as a Senior Design Engineer and held a position as an R&D Engineer at United Telecoms Limited from 2003 to 2005.
Education and Expertise
Lokesh Kumar M completed his Bachelor of Engineering in Electronics and Communications at PESIT, Bangalore, from 1998 to 2002. He also attended Jawahar Navodaya Vidyalaya in Madanapalli, where he studied from 1991 to 1998. His educational background provides a strong foundation in electronics, complemented by his expertise in verification using Verilog and System Verilog, as well as knowledge of various communication protocols.
Technical Skills and Contributions
Lokesh Kumar M possesses extensive knowledge in the design, implementation, and verification of complex chips at advanced process technology nodes, including 65nm, 40nm, and 28nm. He has contributed to the development of WLAN, Ethernet MAC (802.x), and baseband IPs through architecture and micro-architecture design. His skills also encompass coverage analysis and debugging, along with involvement in high-temperature operating life (HTOL) and electrostatic discharge (ESD) processes during production ramp-up.