Ravi Kalyanaraman
About Ravi Kalyanaraman
Ravi Kalyanaraman serves as the Director of Design Verification for the IoT Division at Synaptics, a position he has held since 2017. He has extensive experience in design verification, having previously worked at Marvell Semiconductor and Intel Corporation.
Current Role at Synaptics
Ravi Kalyanaraman serves as the Director of Design Verification in the IoT Division at Synaptics. He has held this position since 2017, contributing to the company's efforts in developing innovative solutions in the Internet of Things sector. Based in San Jose, California, he oversees design verification processes, ensuring the reliability and functionality of IoT products.
Previous Experience at Marvell Semiconductor
Prior to his current role, Kalyanaraman worked at Marvell Semiconductor from 2013 to 2017. He held the position of Director of ASIC Design Verification for the Multimedia and IoT Business Unit. His responsibilities included leading verification strategies and managing teams to enhance product development in the semiconductor industry.
Early Career at Intel Corporation
Kalyanaraman's career began at Intel Corporation, where he worked in various roles from 2000 to 2007. He initially served as a Technical Verification Lead for chipsets from 2000 to 2003. He later advanced to the role of Senior Verification Architect, where he contributed to the verification processes for multiple projects until 2007.
Educational Background
Ravi Kalyanaraman holds a Master of Business Administration from the W. P. Carey School of Business at Arizona State University, which he completed between 2002 and 2004. He also earned a Master of Science in Computer Engineering from the University of Cincinnati, where he studied from 1991 to 1993. His educational background supports his expertise in design verification and business management.
Experience in Design Verification Management
In addition to his roles at Synaptics and Marvell Semiconductor, Kalyanaraman served as a Senior Design Verification Manager at Marvell from 2007 to 2013. In this capacity, he was responsible for overseeing design verification teams and ensuring the successful execution of verification plans for various semiconductor products.